In computer processing systems, processing devices generally provide address signals to obtain access to other devices, such as memories. A memory device may be a memory system including multiple memory banks providing volatile data storage. There are numerous known memory types that can be used in processing systems. Synchronous Dynamic Random Access Memory (SDRAM) is a type of memory that is used in a wide variety of computer systems such as, for example, microprocessor and digital signal processor systems.
An SDRAM memory system may include a plurality of memory banks. Some memory systems permit banks of only one particular size, while others may permit banks of different sizes. Each memory bank may be divided into a plurality of pages. Pages are further logically divided into words. Words have a fixed number of bytes such as, for example, 16 bytes. Typically, an address sent from a processing device to the memory system indicates a particular word that is being accessed.
A number of address bits necessary to represent a location in a memory bank generally depends on the size of the memory bank, because the number of bits in the address must be sufficient to enumerate all possible addresses in the memory bank. For example, in systems where each byte can be addressed, at least 24 bits are needed to address each byte in a 16-megabyte memory bank (16 megabytes contain 224 bytes), and therefore a minimum address size for such a bank is 24 bits.
Although minimum address sizes vary for memory banks of different sizes, a memory system typically has one standard address size that is used by the processing device to indicate a word that is being accessed. The standard address size is typically at least the minimum size for the largest allowed memory bank. For example, in a byte-addressed system allowing for memory banks ranging in size from 2 megabytes to 128 megabytes, an address for a particular byte is at least 27 bits wide (128 megabytes contain 227 bytes). Additional address bits may be needed to indicate which of the memory banks is being addressed. For example, in a system having a maximum of 8 memory banks, at least 3 additional bits are needed to indicate location of the accessed word in one of the eight memory banks.
In a system that permits memory banks of different sizes, where all addresses are passed directly to the memory banks, there may be gaps in the address space—that is, there may not be any physical memory space corresponding to a particular set of addresses. Such gaps can occur when an address space is logically divided between available memory banks into equal subspaces. Some address subspaces may not be fully populated because they are larger than the actual memory bank to which they are assigned. For example, in a memory system allowing memory banks ranging from 2 to 128 megabytes, each memory bank may be allocated 227 addresses, which is appropriate for a 128 megabyte memory bank. However, when a memory bank smaller than the maximum size of 128 megabytes is used, some addresses have no corresponding physical memory space, thereby producing a gap in the address space between the end of the smaller memory bank and the beginning of the following memory bank. As a result of the gap, the address space for the system is not contiguous.
In a system that does not provide a contiguous memory space for software applications, each software program (and, correspondingly, each programmer writing programs for that system) needs to know which addresses are available and to request access to only those addresses. Knowing which addresses are available requires additional consideration and effort from the programmers and compilers, and makes programs more complex and less efficient.
Some memory systems incorporate memory management controllers that provide a contiguous address space. Those controllers, however, are typically highly complex and require complex interaction with an operating system, which is undesired in embedded processors, real time processors, microprocessors and digital signal processors. Therefore, a system is needed in which a contiguous memory address is provided without a significant computational overhead.